Rajesh Chitturi

Skills

Experiences

1. 

   Infineon Technologies

   Aug 2018 - Current

   Senior Pre-Silicon Verification Engineer
2. 

   NXP Semiconductors

   Jan 2013 - Apr 2015

   Verification Engineer
3. 

   NXP Semiconductors

   Jan 2012 - Dec 2012

   Intern working on System Verilog (UVM) and SystemC

   1.Developed generic built-in framework in VPE (Virtual Prototype Environment) using Keil and PERL/tk for the users to analyze CPU performance for all type of processor based applications (ARM, 8051... etc). that helps Architects for architectural exploration by providing them Instruction profiling, And comparing the ISS results against Carbon/RTL CPU for consistency. 2.Developed generic Traffic Generator TLM based SystemC module to generate data in single, repetitive, transfer specified number frames in byte by byte, word by word and frame by frame as per user requirement. It also acts not only as transmitter but also the receiver having feature of loop back check data. Taking in factors like delay, frame data generation, frame length, baud rate.